# Quantum Algorithms for near term Hardware

The quest of fault tolerant quantum computing is estimated to lie further in the future. Nevertheless recent work has already shown that some computations that are classically not feasible can be executed on noisy intermediate-scale quantum (NISQ) hardware, hence introducing the vision of near term quantum computing. This created both, need and opportunity to develop quantum algorithms for NISQ devices that outperform their potential classical counterpart, yet mitigating errors. Challenges with these include non-negligible read-out, single qubit and 2-qubit gate errors as well as limited coherence time, which restrict applicable quantum circuits to several 10s to few 100s of gates in depth. Consequently, current quantum algorithms need to include some kind of error mitigation.

In particular, variational algorithms are intensively studied as hardware efficient solutions for a still rather restricted class of problems. These consist of Quantum Chemistry tasks as well as hardware efficient Hamiltonian simulations that also can encode efficiently combinatorial optimisation such as the Max-3-Cut or travelling salesman problem.

In our research, we explore applications to NISQ hardware of algorithms for time evolution, ground state preparation and combinatorial optimization amongst others. We investigate how to mitigate errors and reduce noise therein and how to exploit symmetries to construct larger quantum circuits.

Furthermore, we investigate quantum neural networks (QNN) which are the analogous to classical neural networks, but are based on quantum circuits. We explore how a quantum perceptron could be implemented using superconducting quantum hardware. We also study various architectures of QNNs such as quantum convolutional neural networks.